On the Complexity of Spill Everywhere under SSA Form

Compilation for embedded processors can be either aggressive (time consuming cross-compilation) or just in time (embedded and usually dynamic). The heuristics used in dynamic compilation are highly constrained by limited resources, time and memory in particular. Recent results on the SSA form open promising directions for the design of new register allocation heuristics for embedded systems and especially for embedded compilation. In particular, heuristics based on tree scan with two separated phases -- one for spilling, then one for coloring/coalescing -- seem good candidates for designing memory-friendly, fast, and competitive register allocators. Still, also because of the side effect on power consumption, the minimization of loads and stores overhead (spilling problem) is an important issue. This paper provides an exhaustive study of the complexity of the ``spill everywhere'' problem in the context of the SSA form. Unfortunately, conversely to our initial hopes, many of the questions we raised lead to NP-completeness results. We identify some polynomial cases but that are impractical in JIT context. Nevertheless, they can give hints to simplify formulations for the design of aggressive allocators.Comment: 10 page

Parallel Copy Motion

International audienceRecent results on the static single assignment (SSA) form open promising directions for the design of new register allocation heuristics for just-in-time (JIT) compilation. In particular, heuris- tics based on tree scans with two decoupled phases, one for spilling, one for splitting/coloring/coalescing, seem good candidates for de- signing memory-friendly, fast, and competitive register allocators. Another class of register allocators, well-suited for JIT compilation, are those based on linear scans. Most of them perform coalesc- ing poorly but also do live-range splitting (mostly on control-flow edges) to avoid spilling. This leads to a large amount of register-to- register copies inside basic blocks but also, implicitly, on critical edges, i.e., edges that flow from a block with several successors to a block with several predecessors. This paper presents a new back-end optimization that we call parallel copy motion. The technique is to move copy instructions in a register-allocated code from a program point, possibly an edge, to another. In contrast with a classical scheduler that must preserve data dependences, our copy motion also permutes register assign- ments so that a copy can "traverse" all instructions of a basic block, except those with conflicting register constraints. Thus, parallel copies can be placed either where the scheduling has some empty slots (for multiple-issues architectures), or where fewer copies are necessary because some variables are dead at this point. Moreover, to the cost of some code compensations (namely, the reverse of the copy), a copy can also be moved out from a critical edge. This pro- vides a simple solution to avoid critical-edge splitting, especially useful when the compiler cannot split it, as it is the case for abnor- mal edges. This compensation technique also enables the schedul- ing/motion of the copy in the successor or predecessor basic block. Experiments with the SPECint benchmarks suite and our own benchmark suite show that we can now apply broadly an SSA-based register allocator: all procedures, even with abnormal edges, can be treated. Simple strategies for moving copies from edges and locally inside basic block show significant average improvements (4% for SPECint and 3% for our suite), with no degradation. It let us believe that the approach is promising, and not only for improving coalescing in fast register allocators

Do Common Educational Datasets Contain Static Information? A Statistical Study

International audienceIn Intelligent Tutoring Systems (ITS), methods to choose the next exercise for a student are inspired from generic recommender systems, used, for instance, in online shopping or multimedia recommendation. As such, collaborative filtering, especially matrix factorization, is often included as apart of recommendation algorithms in ITS. One notable difference in ITS is the rapid evolution of users, who improve their performance, as opposed to multimedia recommendation where preferences are more static. This raises the following question: how reliably can we use matrix factorization, a tool tried and tested in a static environment, in a context where timelines seem to be of importance. In this article we tried to quantify empirically how much information can be extracted statically from datasets in education versus datasets in multimedia, as the quality of such information is critical to be able to accurately make predictions and recommendations. We found that educational datasets contain less static information compared to multi-media datasets, to the extent that vectors of higher dimensions only marginally increase the precision of the matrix factorization compared to a 1-dimensional characterization.These results show that educational datasets must be used with time information, and warn against the dangers of directly trying to use existing algorithms developed for static datasets

Genetic determinism of spontaneous masculinisation in XX female rainbow trout: new insights using medium throughput genotyping and whole-genome sequencing

International audienceRainbow trout has a male heterogametic (XY) sex determination system controlled by a major sex-determining gene, sdY. Unexpectedly, a few phenotypically masculinised fish are regularly observed in all-female farmed trout stocks. To better understand the genetic determinism underlying spontaneous maleness in XX-rainbow trout, we recorded the phenotypic sex of 20,210 XX-rainbow trout from a French farm population at 10 and 15 months post-hatching. The overall masculinisation rate was 1.45%. We performed two genome-wide association studies (GWAS) on a subsample of 1139 individuals classified as females, intersex or males using either medium-throughput genotyping (31,811 SNPs) or whole-genome sequencing (WGS, 8.7 million SNPs). The genomic heritability of maleness ranged between 0.48 and 0.62 depending on the method and the number of SNPs used for the estimation. At the 31K SNPs level, we detected four QTL on three chromosomes (Omy1, Omy12 and Omy20). Using WGS information, we narrowed down the positions of the two QTL detected on Omy1 to 96 kb and 347 kb respectively, with the second QTL explaining up to 14% of the total genetic variance of maleness. Within this QTL, we detected three putative candidate genes, fgfa8, cyp17a1 and an uncharacterised protein (LOC110527930), which might be involved in spontaneous maleness of XX-female rainbow trout

COVID-19 symptoms at hospital admission vary with age and sex: results from the ISARIC prospective multinational observational study

Background: The ISARIC prospective multinational observational study is the largest cohort of hospitalized patients with COVID-19. We present relationships of age, sex, and nationality to presenting symptoms. Methods: International, prospective observational study of 60 109 hospitalized symptomatic patients with laboratory-confirmed COVID-19 recruited from 43 countries between 30 January and 3 August 2020. Logistic regression was performed to evaluate relationships of age and sex to published COVID-19 case definitions and the most commonly reported symptoms. Results: ‘Typical’ symptoms of fever (69%), cough (68%) and shortness of breath (66%) were the most commonly reported. 92% of patients experienced at least one of these. Prevalence of typical symptoms was greatest in 30- to 60-year-olds (respectively 80, 79, 69%; at least one 95%). They were reported less frequently in children (≤ 18 years: 69, 48, 23; 85%), older adults (≥ 70 years: 61, 62, 65; 90%), and women (66, 66, 64; 90%; vs. men 71, 70, 67; 93%, each P < 0.001). The most common atypical presentations under 60 years of age were nausea and vomiting and abdominal pain, and over 60 years was confusion. Regression models showed significant differences in symptoms with sex, age and country. Interpretation: This international collaboration has allowed us to report reliable symptom data from the largest cohort of patients admitted to hospital with COVID-19. Adults over 60 and children admitted to hospital with COVID-19 are less likely to present with typical symptoms. Nausea and vomiting are common atypical presentations under 30 years. Confusion is a frequent atypical presentation of COVID-19 in adults over 60 years. Women are less likely to experience typical symptoms than men

Improvements to Conservative and Optimistic Register Coalescing

18 pagesInternational audienceRegister coalescing is used, as part of register allocation, to reduce the number of register copies. Developing efficient register coalescing heuristics is particularly important to get rid of the numerous move instructions introduced by code transformations such as static single assignment, among others. The challenge is to find a good trade-off between a too aggressive strategy that could make the interference graph uncolorable, possibly increasing the spill (transfer to memory), and a too conservative strategy that preserves colorability but leaves too many moves. The two main approaches are ``iterated register coalescing'' by George and Appel and ``optimistic coalescing'' by Park and Moon. The first one coalesces moves, one by one, in a conservative way. In the second one, moves are first coalesced regardless of the colorability, then some coalescings are undone to reduce spilling. Previous experiments show that optimistic coalescing outperforms conservative coalescing. We show that, with a more involved conservative strategy, incremental conservative coalescing can be as efficient as optimistic coalescing. We also develop a more aggressive optimistic approach with a different de-coalescing phase. The combination of the two approaches leads to about 10% improvements compared to traditional optimistic coalescing

Étude des problèmes de <i>spilling</i> et <i>coalescing</i> liés à l'allocation de registres en tant que deux phases distinctes

Version finale (7 septembre 2009)The goal of register allocation is to assign the variables of a program to the registers or to spill them to memory whenever there are no register left. Since memory is much slower than registers, it is best to minimize the spilling. However, the problem is complicated because spilling is tightly bounded with the colorability of the program. Chaitin et al. [1981] modeled register allocation as an interference graph coloring problem, which they proved NP-complete. So, there is no exact way in this model to tell whether some spilling is necessary or not, and if it is, what to spill and where. In Chaitin et al.'s algorithm, a spilled variable is removed everywhere in the program, even at places where there is enough registers, which leads to unnecessary memory transfers. To address this problem, many authors remarked that splitting the live ranges of variables by inserting copy instructions creates smaller live-ranges. Hence, only part of live ranges can be spilled instead spilling "everywhere." The difficulty is then to choose the right places to split the live ranges. In practice, authors get better spill results when splitting at many program points [Briggs, 1992; Appel and George, 2001], but splitting introduces register-to-register moves to reconcile variables with sub-variables in case they are colored differently. Coalescing is expected remove most of these move instructions, but if it does not, the benefit of a better spill can be canceled out. This led Appel and George [2001] to introduce the "Coalescing Challenge." Recently (2004), three teams discover that the interference graph of a program under Static Single Assignment (SSA) is chordal. Hence, coloring the graph becomes easy with a simplicial elimination scheme and there has been hopes that SSA would simplify register allocation. Ours were that, as the coloring was, the spilling and the coalescing might get easier to solve, as we now have a exact coloring test. Our first goal was to better understand from where the complexity of register allocation does come, and why SSA seems to simplify the problem. We came back to the original proof of Chaitin et al. [1981], finding that the difficulty comes from the pres- ence of (critical) edges and the possibility to perform permutations of colors or not. We studied the spill problem under SSA and several versions of the coalescing problem. The general cases were proven NP-complete but we hopefully found one polynomial result: incremental coalescing for programs under SSA. We used it to design new heuristics to better solve the coalescing problem, so that an aggressive splitting can be used beforehand. This led us to promote a better register allocation scheme. While previous tentatives gave mitigated results, our better coalescing allowed us to cleanly separate register allocation into two independent phases: First, spilling to reduce the register pressure to the number of registers, possibly by splitting a lot; Then color the variables and perform coalescing to remove most of the added copies. This scheme is expected to perform well in an aggressive compiler. However, the high number of splits and the increased compilation time required to perform the coalescing is prohibitive for just-in-time (JIT) compilation. So, we devised a heuristic, called "permutation motion," that is intended to be used with SSA-based splitting in place of our more aggressive coalescing in a JIT context.Le but de l'allocation de registres est d'assigner les variables d'un programme aux registres ou de les " spiller " en mémoire s'il n'y a plus de registre disponible. La mémoire est bien plus lente, il est donc préférable de minimiser le spilling. Ce problème est difficile il est étroitement lié à la colorabilité du programme. Chaitin et al. [1981] ont modélisé l'allocation de registres en le coloriage du graphe d'interférence, qu'ils ont prouvé NP-complet, il n'y a donc pas dans ce modèle de test exact qui indique s'il est nécessaire ou non de faire du spill, et si oui quoi spiller et où. Dans l'algorithme de Chaitin et al., une variable spillée est supprimée dans tout le programme, ce qui est inefficace aux endroits où suffisamment de registres sont encore disponibles. Pour palier ce problème, de nombreux auteurs ont remarqué que l'on peut couper les intervalles de vie des variables grâce à l'insertion d'instructions de copies, ce qui crée des plus petits intervalles et permet de spiller les variables sur des domaines plus réduits. La difficulté est alors de choisir les bons endroits où couper les intervalles. En pratique, on obtient de meilleurs résultats si les intervalles sont coupés en de très nom- breux points [Briggs, 1992; Appel and George, 2001], on attend alors du coalescing qu'il enlève la plupart de ces copies, mais s'il échoue, le bénéfice d'avoir un meilleur spill peut être annulé. C'est pour cette raison que Appel and George [2001] ont créé le " Coalescing Challenge ". Récemment (2004), trois équipes ont découvert que le graphe d'interférence d'un programme sous la forme Static Single Assignment (SSA) sont cordaux. Colorier le graphe devient alors facile avec un schéma d'élimination simpliciel et la communauté se demande si SSA simplifie l'allocation de registres. Nos espoirs étaient que, comme l'était le coloriage, le spilling et le coalescing deviennent plus facilement résolubles puisque nous avons à présent un test de coloriage exact. Notre premier but a alors été de mieux comprendre d'où venait la complexité de l'allocation de registres, et pourquoi le SSA semble simplifier le problème. Nous sommes revenus à la preuve originelle de Chaitin et al. [1981] pour mettre en évidence que la difficulté vient de la présence d'arcs critiques et de la possibilité d'effectuer des permutations de couleurs ou non. Nous avons étudié le problème du spill sous SSA et différentes versions du problème de coalescing : les cas généraux sont NP-complets mais nous avons trouvé un résultat polynomial pour le coalescing incrémental sous SSA. Nous nous en sommes servis pour élaborer de nouvelles heuristiques plus efficaces pour le problème du coalescing, ce qui permet l'utilisation d'un découpage agressif des intervalles de vie. Ceci nous a conduit à recommander un meilleur schéma pour l'allocation de reg- istres. Alors que les tentatives précédentes donnaient des résultats mitigés, notre coa- lescing amélioré permet de séparer proprement l'allocation de registres en deux phases indépendantes : premièrement, spiller pour réduire la pression registre, en coupant po- tentiellement de nombreuses fois ; deuxièmement, colorier les variables et appliquer le coalescing pour supprimer le plus de copies possible. Ce schéma devrait être très efficace dans un compilateur de type agressif, cepen- dant, le grand nombre de coupes et l'augmentation du temps de compilation nécessaire pour l'exécution du coalescing sont prohibitifs à l'utilisation dans un cadre de com- pilation just-in-time (JIT). Nous avons donc créé une nouvelle heuristique appelée " déplacement de permutation ", faite pour être utilisée avec un découpage selon SSA, qui puisse remplacer notre coalescing dans ce contexte

Etude des problèmes de spilling et coalescing liés à l'allocation de registres en tant que deux phases distinctes

Le but de l'allocation de registres est d'assigner les variables d'un programme aux registres ou de les spiller en mémoire s'il n'y a plus de registre disponible. Minimiser le spilling est un problème est difficile étroitement lié à la colorabilité du programme. La forme SSA facilite le coloriage en coupant les variables : nous avons découvert que le graphe d'interférence devient alors cordal. Nous avons d'abord cherché à comprendre d'où venait la complexité de l'allocation de registres, et pourquoi la forme SSA semblait simplifier le problème, en revisitant la preuve de NP-complétude de Chaitin (1981). La difficulté vient de la présence d'arcs critiques et de la possibilité d'effectuer des permutations de couleurs ou non. Nous avons alors étudié le problème du spill sous SSA et différentes versions du problème de coalescing. Nous nous en sommes servis de ces résultats pour élaborer de nouvelles heuristiques plus efficaces pour le problème du coalescing et par conséquent un meilleur schéma pour l'allocation de registres. Notre coalescing amélioré permet de séparer proprement l'allocation de registres en deux phases indépendantes : premièrement, spiller pour réduire la pression registre ; deuxièmement, colorier les variables et appliquer le coalescing pour supprimer le plus de copies possible. Notre algorithme étant coûteux, nous avons donc créé une heuristique appelée déplacement de permutation , adapté à la compilation just-in-time (JIT).The goal of register allocation is to assign the variables of a program to the registers or to spill them to memory whenever there are no register left. Minimizing the spilling is a difficult problem, tightly bounded with the colorability of the program. The SSA form simplifies the coloring by splitting variables : we discovered that it makes the interference graph chordal. Our first goal was to better understand from where the complexity of register allocation does come, and why SSA seems to simplify the problem, by revisiting to the original proof of Chaitin (1981). The difficulty comes from the presence of (critical) edges and the possibility to perform permutations of colors or not. We studied the spill problem under SSA and several versions of the coalescing problem. We used it to design new heuristics to better solve the coalescing problem, so that an aggressive splitting can be used beforehand. This led us to promote a better register allocation scheme : First, spilling to reduce the register pressure to the number of registers, possibly by splitting a lot; Then color the variables and perform coalescing to remove most of the added copies. This scheme is expected to perform well in an aggressive compiler. However, the high number of splits and the increased compilation time required to perform the coalescing is prohibitive for just-in-time (JIT) compilation. So, we devised a heuristic, called "permutation motion," that is intended to be used with SSA-based splitting in place of our more aggressive coalescing in a JIT context.LYON-ENS Sciences (693872304) / SudocSudocFranceF

On the complexity of register coalescing

Memory transfers are becoming more important to optimize, for both performance and power consumption. With this goal in mind, new register allocation schemes are developed, which revisit not only the spilling problem but also the coalescing problem. Indeed, a more aggressive strategy to avoid load/store instructions may increase the constraints to suppress (coalesce) move instructions. This paper is devoted to the complexity of the coalescing phase, in particular in the light of recent developments on the SSA form. We distinguish several optimizations that occur in coalescing heuristics: a) aggressive coalescing removes as many moves as possible, regardless of the colorability of the resulting interference graph; b) conservative coalescing removes as many moves as possible while keeping the colorability of the graph; c) incremental conservative coalescing removes one particular move while keeping the colorability of the graph; d) optimistic coalescing coalesces moves aggressively, then gives up about as few moves as possible so that the graph becomes colorable again. We almost completely classify the NP-completeness of these problems, discussing also on the structure of the interference graph: arbitrary, chordal, or k-colorable in a greedy fashion. We believe that such a study is a necessary step for designing new coalescing strategies.